ariel_os_stm32/
gpio.rs

1//! Provides GPIO access.
2
3pub mod input {
4    //! Input-specific types.
5
6    use embassy_stm32::{
7        Peri,
8        gpio::{Level, Pull},
9    };
10
11    #[doc(hidden)]
12    pub use embassy_stm32::gpio::{AnyPin, Input, Pin as InputPin};
13
14    #[cfg(feature = "external-interrupts")]
15    #[doc(hidden)]
16    pub use embassy_stm32::exti::ExtiInput as IntEnabledInput;
17
18    /// Whether inputs support configuring whether a Schmitt trigger is enabled.
19    pub const SCHMITT_TRIGGER_CONFIGURABLE: bool = false;
20
21    #[doc(hidden)]
22    pub fn new<T: InputPin>(
23        pin: Peri<'static, T>,
24        pull: ariel_os_embassy_common::gpio::Pull,
25        _schmitt_trigger: bool, // Not supported by this hardware
26    ) -> Result<Input<'static>, ariel_os_embassy_common::gpio::input::Error> {
27        let pull = from_pull(pull);
28        Ok(Input::new(pin, pull))
29    }
30
31    #[cfg(feature = "external-interrupts")]
32    #[doc(hidden)]
33    pub fn new_int_enabled<T: InputPin>(
34        pin: Peri<'static, T>,
35        pull: ariel_os_embassy_common::gpio::Pull,
36        _schmitt_trigger: bool, // Not supported by this hardware
37    ) -> Result<IntEnabledInput<'static>, ariel_os_embassy_common::gpio::input::Error> {
38        let pull = from_pull(pull);
39        let ch = crate::extint_registry::EXTINT_REGISTRY.get_interrupt_channel_for_pin(&pin)?;
40        let pin: Peri<'_, AnyPin> = pin.into();
41        Ok(IntEnabledInput::new(pin, ch, pull))
42    }
43
44    ariel_os_embassy_common::define_from_pull!();
45    ariel_os_embassy_common::define_into_level!();
46}
47
48pub mod output {
49    //! Output-specific types.
50
51    use embassy_stm32::{Peri, gpio::Level};
52
53    #[doc(hidden)]
54    pub use embassy_stm32::gpio::{Output, Pin as OutputPin};
55
56    /// Whether outputs support configuring their drive strength.
57    pub const DRIVE_STRENGTH_CONFIGURABLE: bool = false;
58    /// Whether outputs support configuring their speed/slew rate.
59    pub const SPEED_CONFIGURABLE: bool = true;
60
61    #[doc(hidden)]
62    pub fn new(
63        pin: Peri<'static, impl OutputPin>,
64        initial_level: ariel_os_embassy_common::gpio::Level,
65        _drive_strength: super::DriveStrength, // Not supported by hardware
66        speed: super::Speed,
67    ) -> Output<'static> {
68        let initial_level = match initial_level {
69            ariel_os_embassy_common::gpio::Level::Low => Level::Low,
70            ariel_os_embassy_common::gpio::Level::High => Level::High,
71        };
72        Output::new(pin, initial_level, speed.into())
73    }
74}
75
76pub use ariel_os_embassy_common::gpio::UnsupportedDriveStrength as DriveStrength;
77
78/// Available output speed/slew rate settings.
79#[derive(Copy, Clone, PartialEq, Eq)]
80pub enum Speed {
81    /// Low.
82    Low,
83    /// Medium.
84    Medium,
85    /// High.
86    High,
87    /// Very high.
88    VeryHigh,
89}
90
91impl From<Speed> for embassy_stm32::gpio::Speed {
92    fn from(speed: Speed) -> Self {
93        match speed {
94            Speed::Low => Self::Low,
95            Speed::Medium => Self::Medium,
96            #[cfg(not(any(gpio_v1, syscfg_f0)))]
97            Speed::High => Self::High,
98            #[cfg(any(gpio_v1, syscfg_f0))]
99            Speed::High => Self::VeryHigh,
100            Speed::VeryHigh => Self::VeryHigh,
101        }
102    }
103}
104
105impl ariel_os_embassy_common::gpio::FromSpeed for Speed {
106    fn from(speed: ariel_os_embassy_common::gpio::Speed<Self>) -> Self {
107        match speed {
108            ariel_os_embassy_common::gpio::Speed::Hal(speed) => speed,
109            ariel_os_embassy_common::gpio::Speed::Low => Self::Low,
110            ariel_os_embassy_common::gpio::Speed::Medium => Self::Medium,
111            ariel_os_embassy_common::gpio::Speed::High => Self::High,
112            ariel_os_embassy_common::gpio::Speed::VeryHigh => Self::VeryHigh,
113        }
114    }
115}
ariel_os_stm32/gpio.rs

ariel_os_stm32/
gpio.rs
