ariel_os_stm32/
gpio.rs

1//! Provides GPIO access.
2
3pub mod input {
4    //! Input-specific types.
5
6    use embassy_stm32::{
7        Peripheral,
8        gpio::{Level, Pull},
9    };
10
11    #[doc(hidden)]
12    pub use embassy_stm32::gpio::{Input, Pin as InputPin};
13
14    #[cfg(feature = "external-interrupts")]
15    #[doc(hidden)]
16    pub use embassy_stm32::exti::ExtiInput as IntEnabledInput;
17
18    /// Whether inputs support configuring whether a Schmitt trigger is enabled.
19    pub const SCHMITT_TRIGGER_CONFIGURABLE: bool = false;
20
21    #[doc(hidden)]
22    pub fn new(
23        pin: impl Peripheral<P: InputPin> + 'static,
24        pull: ariel_os_embassy_common::gpio::Pull,
25        _schmitt_trigger: bool, // Not supported by this hardware
26    ) -> Result<Input<'static>, ariel_os_embassy_common::gpio::input::Error> {
27        let pull = from_pull(pull);
28        Ok(Input::new(pin, pull))
29    }
30
31    #[cfg(feature = "external-interrupts")]
32    #[doc(hidden)]
33    pub fn new_int_enabled<P: Peripheral<P = T> + 'static, T: InputPin>(
34        pin: P,
35        pull: ariel_os_embassy_common::gpio::Pull,
36        _schmitt_trigger: bool, // Not supported by this hardware
37    ) -> Result<IntEnabledInput<'static>, ariel_os_embassy_common::gpio::input::Error> {
38        let pull = from_pull(pull);
39        let mut pin = pin.into_ref();
40        let ch = crate::extint_registry::EXTINT_REGISTRY.get_interrupt_channel_for_pin(&mut pin)?;
41        let pin = pin.into_ref().map_into();
42        Ok(IntEnabledInput::new(pin, ch, pull))
43    }
44
45    ariel_os_embassy_common::define_from_pull!();
46    ariel_os_embassy_common::define_into_level!();
47}
48
49pub mod output {
50    //! Output-specific types.
51
52    use embassy_stm32::{Peripheral, gpio::Level};
53
54    #[doc(hidden)]
55    pub use embassy_stm32::gpio::{Output, Pin as OutputPin};
56
57    /// Whether outputs support configuring their drive strength.
58    pub const DRIVE_STRENGTH_CONFIGURABLE: bool = false;
59    /// Whether outputs support configuring their speed/slew rate.
60    pub const SPEED_CONFIGURABLE: bool = true;
61
62    #[doc(hidden)]
63    pub fn new(
64        pin: impl Peripheral<P: OutputPin> + 'static,
65        initial_level: ariel_os_embassy_common::gpio::Level,
66        _drive_strength: super::DriveStrength, // Not supported by hardware
67        speed: super::Speed,
68    ) -> Output<'static> {
69        let initial_level = match initial_level {
70            ariel_os_embassy_common::gpio::Level::Low => Level::Low,
71            ariel_os_embassy_common::gpio::Level::High => Level::High,
72        };
73        Output::new(pin, initial_level, speed.into())
74    }
75}
76
77pub use ariel_os_embassy_common::gpio::UnsupportedDriveStrength as DriveStrength;
78
79/// Available output speed/slew rate settings.
80#[derive(Copy, Clone, PartialEq, Eq)]
81pub enum Speed {
82    /// Low.
83    Low,
84    /// Medium.
85    Medium,
86    /// High.
87    High,
88    /// Very high.
89    VeryHigh,
90}
91
92impl From<Speed> for embassy_stm32::gpio::Speed {
93    fn from(speed: Speed) -> Self {
94        match speed {
95            Speed::Low => Self::Low,
96            Speed::Medium => Self::Medium,
97            #[cfg(not(any(gpio_v1, syscfg_f0)))]
98            Speed::High => Self::High,
99            #[cfg(any(gpio_v1, syscfg_f0))]
100            Speed::High => Self::VeryHigh,
101            Speed::VeryHigh => Self::VeryHigh,
102        }
103    }
104}
105
106impl ariel_os_embassy_common::gpio::FromSpeed for Speed {
107    fn from(speed: ariel_os_embassy_common::gpio::Speed<Self>) -> Self {
108        match speed {
109            ariel_os_embassy_common::gpio::Speed::Hal(speed) => speed,
110            ariel_os_embassy_common::gpio::Speed::Low => Self::Low,
111            ariel_os_embassy_common::gpio::Speed::Medium => Self::Medium,
112            ariel_os_embassy_common::gpio::Speed::High => Self::High,
113            ariel_os_embassy_common::gpio::Speed::VeryHigh => Self::VeryHigh,
114        }
115    }
116}
ariel_os_stm32/gpio.rs

ariel_os_stm32/
gpio.rs
