ariel_os_stm32/
gpio.rs

1//! Provides GPIO access.
2
3pub mod input {
4    //! Input-specific types.
5
6    use embassy_stm32::{
7        Peri,
8        gpio::{Level, Pull},
9    };
10
11    #[doc(hidden)]
12    pub use embassy_stm32::gpio::{AnyPin, Input, Pin as InputPin};
13
14    #[cfg(feature = "external-interrupts")]
15    #[doc(hidden)]
16    pub type IntEnabledInput<'d> = embassy_stm32::exti::ExtiInput<'d, embassy_stm32::mode::Async>;
17
18    /// Whether inputs support configuring whether a Schmitt trigger is enabled.
19    pub const SCHMITT_TRIGGER_CONFIGURABLE: bool = false;
20
21    #[doc(hidden)]
22    pub fn new<T: InputPin>(
23        pin: Peri<'_, T>,
24        pull: ariel_os_embassy_common::gpio::Pull,
25        _schmitt_trigger: bool, // Not supported by this hardware
26    ) -> Result<Input<'_>, ariel_os_embassy_common::gpio::input::Error> {
27        let pull = from_pull(pull);
28        Ok(Input::new(pin, pull))
29    }
30
31    #[cfg(feature = "external-interrupts")]
32    #[doc(hidden)]
33    pub fn new_int_enabled<T: InputPin>(
34        pin: Peri<'_, T>,
35        pull: ariel_os_embassy_common::gpio::Pull,
36        _schmitt_trigger: bool, // Not supported by this hardware
37    ) -> Result<IntEnabledInput<'_>, ariel_os_embassy_common::gpio::input::Error> {
38        let pull = from_pull(pull);
39        Ok(crate::extint_registry::EXTINT_REGISTRY.new_exti_input(pin, pull)?)
40    }
41
42    ariel_os_embassy_common::define_from_pull!();
43    ariel_os_embassy_common::define_into_level!();
44}
45
46pub mod output {
47    //! Output-specific types.
48
49    use embassy_stm32::{Peri, gpio::Level};
50
51    #[doc(hidden)]
52    pub use embassy_stm32::gpio::{Output, Pin as OutputPin};
53
54    /// Whether outputs support configuring their drive strength.
55    pub const DRIVE_STRENGTH_CONFIGURABLE: bool = false;
56    /// Whether outputs support configuring their speed/slew rate.
57    pub const SPEED_CONFIGURABLE: bool = true;
58
59    #[doc(hidden)]
60    pub fn new(
61        pin: Peri<'_, impl OutputPin>,
62        initial_level: ariel_os_embassy_common::gpio::Level,
63        _drive_strength: super::DriveStrength, // Not supported by hardware
64        speed: super::Speed,
65    ) -> Output<'_> {
66        let initial_level = match initial_level {
67            ariel_os_embassy_common::gpio::Level::Low => Level::Low,
68            ariel_os_embassy_common::gpio::Level::High => Level::High,
69        };
70        Output::new(pin, initial_level, speed.into())
71    }
72}
73
74pub use ariel_os_embassy_common::gpio::UnsupportedDriveStrength as DriveStrength;
75
76/// Available output speed/slew rate settings.
77#[derive(Copy, Clone, PartialEq, Eq)]
78pub enum Speed {
79    /// Low.
80    Low,
81    /// Medium.
82    Medium,
83    /// High.
84    High,
85    /// Very high.
86    VeryHigh,
87}
88
89impl From<Speed> for embassy_stm32::gpio::Speed {
90    fn from(speed: Speed) -> Self {
91        match speed {
92            Speed::Low => Self::Low,
93            Speed::Medium => Self::Medium,
94            #[cfg(not(any(gpio_v1, syscfg_f0)))]
95            Speed::High => Self::High,
96            #[cfg(any(gpio_v1, syscfg_f0))]
97            Speed::High => Self::VeryHigh,
98            Speed::VeryHigh => Self::VeryHigh,
99        }
100    }
101}
102
103impl ariel_os_embassy_common::gpio::FromSpeed for Speed {
104    fn from(speed: ariel_os_embassy_common::gpio::Speed<Self>) -> Self {
105        match speed {
106            ariel_os_embassy_common::gpio::Speed::Hal(speed) => speed,
107            ariel_os_embassy_common::gpio::Speed::Low => Self::Low,
108            ariel_os_embassy_common::gpio::Speed::Medium => Self::Medium,
109            ariel_os_embassy_common::gpio::Speed::High => Self::High,
110            ariel_os_embassy_common::gpio::Speed::VeryHigh => Self::VeryHigh,
111        }
112    }
113}
ariel_os_stm32/gpio.rs

ariel_os_stm32/
gpio.rs
